Lightweight Hardware Implementation of Binary Ring-LWE PQC Accelerator

Significant innovation has been made in the development of public-key cryptography that is able to withstand quantum attacks, known as post-quantum (PQC). This paper focuses on an efficient PQC hardware implementation. Specifically, implementation binary Ring-learning-with-errors (BRLWE)-based encryption scheme, a promising lightweight suitable for resource-constrained applications, proposed. The first develops mathematical formulation present proposed algorithmic process. corresponding accelerators are then described detail. Finally, comparisons with previous implementations provided demonstrate superior performance design. For instance, low-complexity accelerator 34.7% less area-delay product (ADP) than state-of-the-art design $n=256$ field-programmable gate array (FPGA) platform. Apart from efficiency architectures, also complete input/output processing setup, and thus feasible emerging applications.